The invention relates to a data processing device which is composed of four processing modules of substantially identical construction, with protection both against coincident single-bit failures in a plurality of data processing modules and also against an arbitrary data failure in a single data processing module. A device of this kind is known from U.S. Pat. No. 4512020 issued to Kroe et al, herein incorporated by reference. The known device operates on the basis of so-called symbols of four bits, while an optimum code as therein presented allows in a so-called `normal mode` for correcting of two arbitrary single bit errors, at a minimum Hamming distance of five. In an `erasure` mode, one of the data processing modules is ignored while the code over the remaining three four-bit symbols has a Hamming distance of three, allowing for one additional bit-error to be correctable. If any two data processing modules would fail simultaneously while their identity is known, the two remaining data processing modules, in the absence of further errors, could still function and attain the correct results. The above error protection capability may be expressed in the minimum distance profile of this code at a redundancy of 100% as being (5,3,1). The definition of minimum distance profile is given hereinafter.